4-6 Weeks’ Lead Time for X564P-T
Based on barefoot Tofino switching silicon, X564P-T is Top-of-Rack (TOR) or spine switch for high-performance data centers. With its ASIC-level programmability, it also can be deployed as smart gateway switch to flexible respond to different network scenarios.
64 x 100Gb QSFP28, 6.4Tbps
Dual-redundant, load-sharing, hot-swappable PSUs
3+1 redundant, hot-swappable fan modules
This model is a part of Asterfusion ‘s P4 programmable switch for Academia and Research program. Please email to us for discounted price before ordering.
The hardware includes X-T series based on Intel/Barefoot Tofino1 ;CX-N series on Innovium Teralynx
In the hardware bare metal, there are two options: 1. ONIE; 2. ONIE with ONL or Debian.
If you want develop application for P4 data plane, then the SDE from intel would help you, we will offer you patch for BSP of platform for the SDE; if you want to develop a switch like application, you can use SONiC from community and we will offer you patches to support our hardware; We can even help you to combine P4 and SONiC together to reduce you time-to-market. We have a 30+ people team working on P4 related work and rich experience to develop varies network traffic processing applications on Tofino.
It depends on what kind of application are you developing, usually people can start from SONiC community version for switch enhancement, we can offer you a ready-to-run SONiC version as your development basis; or people need to develop some new applications like NPB or gateway using P4, at this time you will have get a license from Intel, usually it is a huge project when you start your development, let’s discuss in the meeting to see how we can help.