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RT2508-4S4M8

Open Enterprise Edge Router Based on Marvell OCTEON 10 CN102 Chip 

The above modules can be mixed and matched, custom combinations are available. Please send us emails for more detailed information!
  • 1-Year Software Upgrade Subscription
  • 8 x 2.5GHz ARM64 Neoverse N2 Core
  • 16GB pluggable DDR5 SO-DIMM, up to 48G
  • 4 x 10GE, 4 x 2.5GE and 8 x 1GE, optional 8 x 1GE PoE+, 4 x 2.5GE PoE++ @150W budget
  • True inline crypto engine; Optional M.2 SSD up to 4TB
  • Optional PTP module with 20ns accuracy and holdover > 8 hours

Enterprise-Ready Edge Router/Gateway 8-Core ARM 64-bit Neoverse N2 | Marvell OCTEON 10 CN102

The Asterfusion RT2508-4S4M8  is a versatile, enterprise-ready edge router designed for modern networking. Built on an open architecture with modular expansion, it seamlessly adapts to campus edge and cellular WAN routing deployments, delivering up to 58Gbps switching capacity, 50Gbps Layer 3 routing throughput, and 50Gbps hardware-accelerated IPsec encryption/decryption.

Preloaded with AsterNOS-VPP, Asterfusion’s enterprise SONiC routing OS, the platform delivers an out-of-the-box open router requiring no software adaptation. By combining SONiC control plane reliability with DPDK-accelerated VPP forwarding, it supports full Internet BGP scale, OSPFv2/v3, and MP-BGP. Features like 256-way ECMP, Policy-Based Routing, Multi-VRF, and EVPN-VXLAN enable intelligent traffic steering, resilient multi-path load balancing, and secure overlay segmentation.

Open Enterprise Router Application Scenarios


The open enterprise router leverages a hardware-software disaggregated architecture, combining an Enterprise SONiC control plane with a hardware-optimized data plane. This architecture suits diverse application scenarios and flexible deployments.

campus edge router scenario

Campus Edge Router: AsterNOS-VPP

  • The Campus Edge Router enables edge routing scenarios for effective egress traffic management and scalable cloud federation.
  • Supporting protocols such as BGP and VXLAN to manage complex traffic for edge gateways.
  • Hardware-optimized vector packet technology and DPDK accelerate data plane forwarding.
  • Enables exact traffic control across apps with comprehensive QoS policies.
ISP BNG-BRAS Networking

ISP BNG/BRAS Networking

  • RT2508: High-Performance BNG/BRAS for Carrier-Grade Networks
  • Granular Session Management: Full IPoE/PPPoE access with integrated AAA & dynamic billing.
  • Multi-dimensional H-QoS: User/Service-based scheduling for IPTV, VoIP, and Data.
Multi-wan router gateway scenario

Multi-WAN Internet

  • HA & VRRP Sync Group: Ensures seamless WAN failover using VRRP and VRRP Sync Group to align L2 state with routing updates.
  • Flexible IPv4/v6 Transition: Implements NAT, CGNAT, MAP-E, and MAP-T for scalable IPv4 reuse and IPv6 transition.
  • Granular Traffic Control: Integrates dynamic SLA monitoring with Routing track to guarantee critical application performance.

Operating System


AsterNOS-VPP

AsterNOS-VPP bridges SONiC’s robust management control plane with VPP’s vector-based packet processing architecture. Replacing standard SAI with a VPP-integrated translation layer (libsaivpp), it executes L3 routing, firewall, VPN, and NAT at line rate across both hardware and virtual platforms.

To maximize forwarding efficiency, the OS leverages an optimized DPDK framework tightly integrated with Marvell hardware crypto and offload engines. It extends core routing capability through a rich suite of VPP plugins, including QUIC, SRv6, NAT64, LACP, LLDP, and SRTP, enabling granular service expansion without compromising throughput.

AsterNOS-VPP NOS Architecture on Open Edge Router

Rich Software Features


Domain & Location-Based Traffic Control

Leverages GeoIP and GeoSite ACLs to enforce location-aware access policies and domain-based traffic steering. The platform enables automated routing and filtering by dynamically mapping traffic to geographic regions or specific internet services.
Geosite-GeoIP-on data center edge router

Enterprise Edge Security with SPI & uRPF

Integrates Stateful Packet Inspection (SPI) with Unicast Reverse Path Forwarding (uRPF) to protect edge networks. This combined architecture enforces session-aware traffic filtering while validating source IP integrity to prevent IP spoofing and unauthorized access.
SPI-URPF on data center edge router

Wire-speed Encryption and Decryption – IPsec and WireGuard VPN

Features IPsec and WireGuard VPN offloaded to the Marvell OCTEON 10 DPU inline crypto engine, delivering wire-speed encryption and secure enterprise connectivity without taxing CPU performance.
IPSec-on data center edge router

Point-to-Point Layer 2 Encryption – MACSec

Supports MACsec (Media Access Control Security), providing layer 2 encryption for secure, high-speed connectivity across your campus or enterprise network.
ai-ml-hpc

Enterprise 1G/2.5G RJ45 PoE+ Router with PTP Support(Optional)

Offers hardware and software support for IEEE 1588 PTPv2, delivering sub-microsecond precision. The platform accommodates key industry profiles, including IEEE 1588v2, G.8275.1, G.8275.2, SMPTE 2059-2, and AES67. It operates flexibly across clock roles, such as Boundary Clock (BC) and Ordinary Clock (OC).
PTP Networking with Open Edge Router

Modern Network Monitoring & Visualization

AsterNOS-VPP supports Node Exporter to send CPU, traffic, packet loss, latency, and RoCE congestion metrics to Prometheus.
Paired with Grafana, it enables real-time, visual insight into network performance.
prometheus-paired-with-grafana

Unified Visualization, Management & O&M with OpenWiFi Network Controller

Integrated with Asterfusion Controller, our Enterprise SONiC edge router enables unified monitoring, ZTP, and automated deployment. It delivers centralized control, real-time visualization, and simplified management across campus WAN edge networks.
Unified Management for Edge Router by OpenWiFi Controller

Specification


Network interface
10GE (SFP+)4 ports2.5GE (RJ45)4 ports
1GE (RJ45)8 portsAntenna6
PoE (Option)2.5GE(PoE++), 1GE(PoE+) portsWiFi (Option)WiFi6E/7, M.2 E key
5G/LTE (Option)2 SIM cards, M.2 B key
Misc. interface
USB1 x USB3.1OOB1 x RS232 RJ45
Computing
DPU Marvell OCTEON 10 CN102
8 Core ARM64 N2 @ 2.5 GHz
RAM16GB DDR5 SODIMM, up to 48GB
CacheL2 8MB, L3 16MBFlash64GB eMMC 5.1
NVME SSD (Option)up to 4TB, M.2 M keySATA SSD (Option)up to 4TB, M.2 M key, dedicated slot
SPECint (2017)37
Network performance
L2/L3 Switching capacity58GbpsRouting capacity50Gbps
Ingress/Egress ACL Entries2k tables/1000k rulesEncryption and Decryption capacity50Gbps
PTP/SyncE accuracy20nsPTP/SyncE holdover time> 8hours
Electrical characteristics
Fan2Power Module1 x 100W (w/o PoE); 1 x 260W (PoE)
Maximum power consumption60W (FULL configuration and workload)Input voltage100~240VAC
PoE budget150W
Mechanical
Operating temperature0 – 45℃Dimensions (W x H x D mm)220 x 44 x 310
Relative humidity5% - 95% (non-condensing)Height1U

Hardware Panel

In The Box

ET2500 intelligent gateway 5

FAQs

What makes the RT2508 different from traditional ASIC/CPU-based enterprise edge routers?

Unlike traditional routers that rely heavily on general-purpose x86 CPUs or closed proprietary ASICs, the RT2508 is built on a Marvell OCTEON CN102 DPU (8-core ARM64) and runs AsterNOS-VPP—an open routing OS combining SONiC’s control plane with a DPDK-accelerated VPP forwarding plane. This architecture offloads line-rate Layer 3 routing (50Gbps) and IPsec crypto processing (50Gbps) directly to hardware, giving you carrier-grade performance, open programmable APIs (REST API, gNMI, NETCONF), and no vendor lock-in.

Can the RT2508 handle full BGP Internet routing tables in real-world deployments?
Yes, easily. Equipped with 16GB DDR5 memory in its base profile (expandable up to 48GB), the RT2508 supports up to 1.2 Million IPv4/IPv6 host and prefix routes out of the box (and up to 4 Million routes with expanded RAM). Given that the global IPv4 BGP Routing Table currently holds around 900k+ routes, the RT2508 provides more than enough headroom to hold full Internet tables from multiple transit providers alongside 256-way ECMP load balancing.
Does hardware-accelerated IPsec encryption slow down routing throughput on the RT2508?

No. The RT2508 features Marvell OCTEON 10 DPU’s true inline cryptographic engine, which fully offloads cipher operations (such as AES-GCM-256 and HMAC-SHA2-512) from the main processor. This enables wire-speed IPsec performance up to 50Gbps without consuming main CPU cycles or adding latency to concurrent Layer 3 routing, CGNAT, or firewall inspection.

How flexible is the interface density and expansion capability on the RT2508?

The RT2508 offers a versatile fixed port configuration combined with rich modular options in a compact 1RU form factor:

  • Fixed Interfaces: 4 x 10GE SFP+ uplink ports, 4 x 2.5GE RJ45 (PoE++ enabled), and 8 x 1GE RJ45 (PoE+ enabled).

  • Wireless & Expansion Slots: Includes M.2 slots supporting optional 5G/LTE dual-SIM modules, Wi-Fi 7/6E, and M.2 NVMe SSDs (up to 4TB) for local storage, telemetry logging, or containerized applications.

How is the RT2508 managed, and can it integrate into existing automation tools like Prometheus and Grafana?

The RT2508 supports both traditional network management via Klish CLI and modern network automation via REST API, gNMI, and NETCONF. Because AsterNOS-VPP runs as a containerized Linux-based OS, it includes a native AsterNOS Prometheus Exporter container. You can instantly export real-time platform metrics, interface stats, and telemetry to your Prometheus server and visualize them directly on standard Grafana dashboards.

How does the RT2508 handle 5G/LTE cellular connectivity compared to traditional USB-dongle-based edge routers?

Unlike entry-level routers that rely on unstable USB dongles, the RT2508 integrates an enterprise-grade M.2 B-key slot over PCIe 3×1 supporting native 5G NR / LTE modules (up to 5.0Gbps DL / 650Mbps UL) with GNSS support. It comes with dual SIM card slots, allowing network administrators to insert SIMs from two different carriers for physical-layer carrier redundancy, lower latency, and higher bus throughput directly tied to the DPU.