64×400G RoCE Switch, 25.6Tbps, Marvell Teralynx 10, For AI/ML/Cloud Data Center/HPC

The primary advantages of QSFP-DD are its backward compatibility and ecosystem maturity. The CX764QD-N provides 64 ports of 400G QSFP-DD within a compact 2RU space. This design allows infrastructure engineers to seamlessly interconnect with existing 100G/200G QSFP modules and DAC cables, simplifying integration with legacy server NICs and existing network deployments while offering a highly abundant supply chain. Despite its exceptional port density, its maximum power consumption (2100W) and physical dimensions (440x87x760 mm) remain well within the power and cooling thresholds of standard AI server racks.

This is a critical bottleneck in AI data center networking. AI workloads feature highly synchronized collective communication patterns (like All-Reduce) that generate few but massive “elephant flows.” Traditional hash-based ECMP frequently routes multiple elephant flows onto the same physical link, resulting in queue congestion and packet loss.

The CX764QD-N natively supports hardware-driven Flowlet-Based Adaptive Routing. Instead of routing based on the entire flow, the hardware detects minute inter-packet gaps to partition elephant flows into granular “flowlets”. It dynamically evaluates the real-time load of available paths and sprays traffic onto the least congested links, eliminating ECMP polarization and significantly reducing Job Completion Time (JCT).

→ Latency: 560ns vs ~800ns
→ Packet Buffer: 200MB vs 165MB

CX764QD-N supports INT. It can report metrics of BDC (Buffer Drop Collector) and HDC (High Delay Collector) to Prometheus, bottleneck analysis can be realized via Grafana.

All OSFP-form 400G modules are supported, including ZR/ZR+ modules.

The CX764QD-N supports IEEE 1588v2 PTP with Class C-level timing accuracy and integrates key industry-specific profiles like SMPTE 2059-2, AES67, ITU-T G.8275.1, and G.8275.2. This allows the 25.6T platform to extend beyond traditional switching into IP Media Broadcasting (ensuring perfect audio/video phase alignment over 400G fabrics) and Telecom Edge Computing (delivering precise clock delivery for carrier-grade synchronization). It flexibly operates across multiple clock roles—including GrandMaster (GM), Boundary Clock (BC), and Ordinary Clock (OC)—to guarantee deterministic, jitter-free timing performance across diverse specialized infrastructures.

ISSU is not supported since it requires dual control plane module in hardware. AsterNOS supports hot-patch upgrades via containers to minimize service interruption.