written by Asterfuison
Over the last few weeks, we’ve been getting a lot of private messages from our customers. It’s no surprise, as the news that has been circulating for some time has been confirmed: Intel announced to the public that they will discontinue development of their Tofino switch chip.
This news has understandably caused a lot of confusion among our customers. We’ve been getting a lot of questions about how this will affect Asterfusion’s product strategy for P4 Programmable Switches.
Let’s put this into perspective, there’s no need to panic.
Above all, the value of P4 to the revolution of network programmable is undeniable, especially in the border gateway application, where P4 switch has a lot of industrial deployments.
For more https://cloudswit.ch/blogs/what-you-should-know-about-p4-programming-language-p4-switch/
Apart from that, Intel is ceasing the subsequent development of the Tofino series, but not the entire line. The products that have already been released are still available on the market.
Intel is ceasing the subsequent development of the Tofino series, but not the entire line. The products that have already been released are still available on the market.
We are aware that the higher the throughput, the lower the requirement for business flexibility when it comes to the core backbone. In the border and gateway scenarios, more complicated network connections are required ,the flexibility and agility facilitated by P4 is even more significant .
Actually, the performance of several Terabytes on Tofino is more than adequate, so there is no need to take advantage of TF3’s excessive bandwidth.
What’s more – the key software technologies of the open network, such as P4 and SAI, are independent of any specific chip, so end users don’t need to worry about the underlying chip-related technologies.
Meantime,thanks to software-defined networking (SDN) technology, excellent open network vendors have the ability to mask the differences between different chips, allowing them to develop the most suitable products and solutions for different scenarios based on existing programmable chip capabilities.
As a promoter of open networks, Asterfusion has extensive experience in the field of network programmable, with mature software and hardware products and support capabilities. We are combining leading open network software technology with self-developed P4 programmable computing network switch with P4 programmable chip + DPU cards.
Combining the massive table item resources and wire-speed forwarding capability given by the programmable ASIC and the flexible DPU service processing module (high performance processor + large-capacity memory), the platform can responsively tackle network function requirements in various situations and decrease the customization development cycle.
At Asterfusion, we continue to remain dedicated to network programmability, we want to assure our customers that we are still providing 2T-6.4T Tofino-based P4 Bare Metal Switches.
Our product strategy for P4 Programmable Switches remains unchanged, and our commitment to providing the best network programmable products is stronger than ever.
Asterfusion offers 2Tbps-6.4 Tbps programmable network switches based on Intel tofino which are well-suited for Leaf/Spine fabric as well as smart gateway of data centers, enterprises, and cloud service providers’ network deployments.
Asterfusion X-T series is an exceptional P4 switch that is designed to bring together high-performance L2-L4 switching programmability and extensible stateful processing power from DPU for the first time in network history. By combining the Intel Tofino switching silicon with the 800G data path connection and the Marvell OcteonTX 9/10 DPU, Asterfusion combines the P4 based data path on the tofino switch and the DPDK based traffic processing on the ARM64 DPU to provide a large stateful table for load balancing, NAT and NVME over fabric applications.
The X-T programmable switches adopt a computing-network integration architecture and have the general programmability of a CPU while retaining the extreme performance of the Intel Tofino ASIC.
The combination of the T-bit level fast path for high-performance wire-speed forwarding and the slow path of in-depth data processing achieves in-depth service processing and application offloading, enhancing the overall computing power and efficiency of the data center.
Asterfusion has been researching open-source networks since 2014, gathering a vast amount of expertise and R & D experience, enabling them to provide expert-level support services to resolve various issues that may arise during open networking development.
Tofino programmable switches support the development of various network applications. Based on the integrated computing & network architecture and expert support, the Barefoot Tofino P4 series programmable hardware platform can handle the challenges of various innovative application scenarios:
NFV gateways, load balancing/network address translation based on state, reducing the load on data centers.
Separating large/small flows, it can handle the high throughput of large flows and high concurrency of small flows.
Distributed INT-powered intelligent network optimization, providing local real-time network telemetry data, improving the overall performance of the system.
Asterfusion P4 programmable switches help customers tackle the problem of needing to program their networking data plane, especially for teams who have the in-house expertise to program networking chips.
Asterfusion provides generous educational discounts on academia and research programs for P4 programming switch research and experiments.
For more, please consult [email protected];
Asterfusion Networks is the leading provider of open networking infrastructure solutions. We provide an open, disaggregated, and highly programmable network fabric for next generation data centers and campus with white-box switching.
For more information on Asterfusion’s products and solutions, please visit https://cloudswit.ch/. For sales inquiries, please send an email to [email protected]
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